The first standalone and complete DSPs were presented at the 1980 IEEE International Solid-State Circuits conference
The development began in the late 1970s when telephone engineers were attempting to create technology with sufficient performance to enable digital touch-tone dialing. At that time, digital signal processing solutions required over a hundred chips and consumed significant amounts of power.
Intel was the first to respond. The company introduced the Intel 2920. While it had an integrated processor that was both digital-to-analog and analog-to-digital converters, it lacked additional features (such as a hardware multiplier) that would be found in later processors.
Then the first "real" DSPs, the NEC µPD7720 and the Bell Labs DSP-1 chip, were created. They run at 4 MHz frequency with 128-word data RAM, 512-word data ROM, and 512-word program memory, which has VLIW-like instruction format, enabling all of ALU operation, address register increment/decrement operation, and move operation in one cycle.
Both processors were inspired by the research in PSTN telecommunications.
DSP (digital signal processor) is a specialized microprocessor or a SIP block that has its architecture optimized for the operational needs of digital signal processing. The goal is to measure, filter and compress continuous signals, and execute algorithms more successfully and more efficiently.
Because DSPs can use special memory architectures that are able to fetch multiple data or instructions at the same time, this has made them to go beyond their initial use in telephony.
Early DSPs can be found on applications in disk drive and graphics controllers, speech synthesis and modems. They have also been used as neural accelerators because they result a high parallel output systems for workstations.
Later on, this innovation has become the milestone for creating suitable computing power on mobile phones because of their power consumption constraints.
Various of other products utilize DSPs to aim at various applications, including neural network simulations.
As a result, AI Accelerators were made. The computer systems are designed to accelerate artificial neural networks, machine vision and other machine learning algorithms for robotics, Internet of Things and other data-intensive or sensor-driven task.
They include: SpiNNaker, Massively parallel processor array by Kalray, the Nervana Engine by Nervana Systems, Intel Loihi, BrainChip, the 28 nm process containing a deep CNN accelerator by STMicroelectronics, as well as the Apple iPhone X''s A11 Bionic SoC among others.
